factorio-riscv/makefile

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VERILATOR ?= verilator
VERILOG_SOURCES = \
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board/system.sv \
board/parts/hart.sv \
board/parts/pmmu.sv \
board/parts/rom.sv
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build/cpu: ${VERILOG_SOURCES}
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mkdir -p build/verilog
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${VERILATOR} --build --binary board/system.sv -Mdir build/verilog +incdir+board
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cp -f build/verilog/Vsystem build/cpu