// RISC-V CPU Hart
module hart(clock);
    input clock; // the clock. pretty important. 

    always begin
        // instruction fetch
        @(posedge clock);
        $display("== INSTRUCTION FETCH ==");

        // instruction decode
        @(posedge clock);
        $display("== INSTRUCTION DECODE ==");

        // get shit
        @(posedge clock);
        $display("== GET REGISTERS ==");

        // execute
        @(posedge clock);
        $display("== EXECUTE ==");

        // write back
        @(posedge clock);
        $display("== WRITE REGISTERS ==");
    end
endmodule