From 03803dd0019e15dce3002b49316caeceb1017b5e Mon Sep 17 00:00:00 2001
From: xwashere <xwashere0@protonmail.com>
Date: Wed, 27 Dec 2023 17:34:12 -0500
Subject: [PATCH] hi

---
 .gitignore        |  1 +
 README.MD         |  3 +++
 makefile          | 12 ++++++++++++
 src/parts/hart.sv | 26 ++++++++++++++++++++++++++
 src/system.sv     | 10 ++++++++++
 5 files changed, 52 insertions(+)
 create mode 100644 .gitignore
 create mode 100644 README.MD
 create mode 100644 makefile
 create mode 100644 src/parts/hart.sv
 create mode 100644 src/system.sv

diff --git a/.gitignore b/.gitignore
new file mode 100644
index 0000000..d9b4f01
--- /dev/null
+++ b/.gitignore
@@ -0,0 +1 @@
+/build/*
diff --git a/README.MD b/README.MD
new file mode 100644
index 0000000..8f89d41
--- /dev/null
+++ b/README.MD
@@ -0,0 +1,3 @@
+## Dependencies
+- verilator
+- clang++
\ No newline at end of file
diff --git a/makefile b/makefile
new file mode 100644
index 0000000..b74490a
--- /dev/null
+++ b/makefile
@@ -0,0 +1,12 @@
+VERILATOR ?= verilator
+
+VERILOG_SOURCES = \
+	src/system.sv \
+	src/parts/hart.sv
+
+.PHONY: build
+
+build: ${VERILOG_SOURCES} 
+	mkdir -p build/verilog
+	${VERILATOR} --build --binary src/system.sv -Mdir build/verilog +incdir+src
+	cp -f build/verilog/Vsystem build/cpu
\ No newline at end of file
diff --git a/src/parts/hart.sv b/src/parts/hart.sv
new file mode 100644
index 0000000..6e9c2d5
--- /dev/null
+++ b/src/parts/hart.sv
@@ -0,0 +1,26 @@
+// RISC-V CPU Hart
+module hart(clock);
+    input clock; // the clock. pretty important. 
+
+    always begin
+        // instruction fetch
+        @(posedge clock);
+        $display("== INSTRUCTION FETCH ==");
+
+        // instruction decode
+        @(posedge clock);
+        $display("== INSTRUCTION DECODE ==");
+
+        // get shit
+        @(posedge clock);
+        $display("== GET REGISTERS ==");
+
+        // execute
+        @(posedge clock);
+        $display("== EXECUTE ==");
+
+        // write back
+        @(posedge clock);
+        $display("== WRITE REGISTERS ==");
+    end
+endmodule
\ No newline at end of file
diff --git a/src/system.sv b/src/system.sv
new file mode 100644
index 0000000..0064c28
--- /dev/null
+++ b/src/system.sv
@@ -0,0 +1,10 @@
+`include "parts/hart.sv";
+
+module system();
+    reg clock = 0; // its the clock
+
+    hart core(clock); // cpu thing
+
+    // run the clock
+    always #1 clock = ~clock;
+endmodule;
\ No newline at end of file